Silicon device modelling and design engineer

Research group leader: Professor Andrew Dzurak
Salary range: AU $123-164k plus 17 per cent employer superannuation and leave loading
Contract: Three years fixed term with possible extension

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Andrew Dzurak is a Scientia Professor within the School of Electrical Engineering and Telecommunications. His research group studies a range of topics in silicon-based quantum computing, nanoelectronics and nanofabrication. His group has access to a dedicated cryo-electrical measurement laboratory with four dilution refrigerators, other supporting cryo-systems, and advanced high frequency and microwave electronics. The group also utilises the experimental facilities of the Australian National Fabrication Facility, of which Prof Dzurak is Director. His research is supported through a range of funding sources including the US Army Research Office, the Australian Research Council, and, in the case of this position, a research contract with Silicon Quantum Computing Pty Ltd. His research group currently comprises six postdoctoral fellows and 11 postgraduate and undergraduate research students. The Australian National Fabrication Facility is supported by a further 13 technical and administrative staff.

This R&D engineer or physicist will join a team, led by Prof Dzurak, focused on the development of silicon-MOS-based quantum dot qubits that are compatible with wafer-scale CMOS manufacturing. Over the past four years the team has demonstrated the world’s first two-qubit quantum logic gate in silicon and one-qubit gates with control fidelities that are compatible with fault-tolerant quantum computing.

The successful candidate will be an experienced engineer or physicist who has direct experience with the design and modelling of silicon nanoelectronic devices, either in an industrial silicon CMOS environment, or in an academic environment. They will be responsible for the design and modelling of CMOS-compatible silicon multi-qubit (up to 10-qubit) integrated devices that will be investigated within Prof Dzurak’s group. Integral to their design process will be analysis of key device engineering parameters such as thermal dissipation, line cross-talk and frequency response.

This is one of more than 20 positions currently open for applications. View the full list of available roles.

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RESPONSIBILITIES

Specific responsibilities for this role include:

Level C

  • Design and modelling of silicon-CMOS multi-qubit devices in support of Professor Dzurak’s core research goals. This project will include:
    • Nanoelectronic device design;
    • Device modelling and integrated circuit simulation, incorporating analysis of cross-talk, frequency response and thermal budget.
  • Contribution to the development of CMOS-compatible 10-qubit systems, as supported by a research contract funded by Silicon Quantum Computing Pty Ltd.
  • Make original contributions to research in the area of expertise and assume a significant role in the research project, and where appropriate, leadership of a research team.
  • Prepare manuscripts for submission to prestigious international journals, production of conference and seminar papers and publications from that research.
  • Involvement in professional activities including, subject to availability of funds, attendance at conferences and seminars in the field of expertise.
  • Involvement, where appropriate, in the promotion of research links with outside bodies.
  • Support the commercialisation of research outcomes and development of intellectual property.
  • Supervision of research-support and administrative staff involved in the staff member’s research.
  • Training and supervision of undergraduate and graduate research students as required.
  • Broad administrative functions including various research-related administrative functions.
  • Attendance at meetings associated with research or the work of the organisational unit to which the research is connected and/or departmental and/or faculty meetings.
  • Cooperate with all health and safety policies and procedures of the university and take all reasonable care to ensure that your actions or omissions do not impact on the health and safety of yourself or others.
  • Ensure hazards and risks are identified and controlled for tasks, projects and activities that pose a health and safety risk within your area of responsibility.

Level D
In addition to the above:

  • Conducts innovative research in the field of expertise and actively contributes to the advancement of research in the field, including publication of outcomes in high quality research outlets and achievement of high international impact.
  • Play a significant role in the leadership of the research project.
  • Significant contribution to the commercialisation of research outcomes and development of intellectual property.
  • Provide leadership in developing significant productive relationships and engagement with industry and the community, as relevant to the research project.
  • High level administrative functions.
  • Significant contributions to all activities of the research team/department/faculty.

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ESSENTIAL SELECTION CRITERIA

Level C

  • PhD in Electrical Engineering or Physics, or equivalent level of accreditation.
  • Demonstrated ability to conduct independent research supported by excellent track record of publications, conference papers, patents, reports and/or professional and/or technical contributions in a relevant discipline area.
  • Strong interpersonal skills with the ability to interact well within a diverse research team and a demonstrated ability to communicate effectively with members of the wider community.
  • Demonstrated experience with semiconductor device modelling software (such as Synopsis TCAD), together with a range of other device modelling and design tools (eg. COMSOL).
  • Demonstrated experience with a CMOS integrated circuit design tool, such as CADENCE, would be desirable.
  • Demonstrated experience with microwave and/or rf integrated circuit design would also be desirable.
  • Some experience with quantum information processing devices would be desirable, but not essential.
  • Demonstrated experience in HDR student supervision.
  • Knowledge of equal opportunity principles plus knowledge of health and safety responsibilities and commitment to attending relevant health and safety training.
  • Ability and capacity to implement required UNSW health and safety policies and procedures.

Level D
In addition to the above:

  • Significant track record in research leadership with demonstrated experience conducting original/innovative research with outcomes of high quality, actively contributing to the advancement of knowledge in relevant subject area/s at a national and international level.
  • Demonstrated success in mentoring high calibre postdoctoral fellows / junior researchers.
  • Demonstrated leadership in building engagement and partnerships with the profession and industry.

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DOWNLOAD the full position description

Closing date: Applications close at 11:59pm on 31 December 2017 AEDT. We encourage all candidates to complete the application process as soon as possible. Potential start dates are negotiable for the successful candidate.

Contact: a [dot] dzurak @unsw.edu.au

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An appointment to this position is subject to the approval of Silicon Quantum Computing Pty Ltd. Personal information submitted as part of an application for this position may be disclosed to SQC for the purpose of processing the application.

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